Bus protocol is important in the field of Intellectual Property (IP) reuse by standardizing the interface of the hardware component as they help in simplifying the task. The Bridge between Advance High Performance (AHB) master and AHB slave also play an important role in communication. Advance Microcontroller bus architecture (AMBA) is the solution for the block to interconnect with each other AMBA protocol family is used to replace complex bridges with the specific protocol block interface in SoC design. The new verification constructs can be easily reused for the objected-oriented feature of System Verilog. The paper also introduced how to design the AMBA (advanced microprocessors bus architecture) verification IP (intellectual property) by System Verilog, which include AHB (advanced high-performance bus) master and AHB monitor. The verification IP can be reused to verify any AMBA protocol based SoC. To reduce the time spending in the verification, a reference model designing method is also discussed in the paper. The approach is to design the core that contains the processing hardware and the minimal interface is adapted by specific protocol by using a wrapper. It is suitable for low latency and high bandwidth design and provides the flexibility in implementation of interconnect architecture, also provides high frequency of operation without using complex bridge Advanced Microcontroller Bus Architecture (AMBA) is the on chip communication standard generally used for designing high performance embedded controller and the IP for verification can be reused to verify other AMBA protocol based System on chip (SoC). The tools used for this project is Modelsim.