This paper is published in Volume-2, Issue-6, 2016
Area
Electronics and Communication Engineering
Author
Shivani. S. Tantarpale, Ms. Archana O. Vyas
Org/Univ
G.H.Raisoni College of Engineering and Management, Amravati, India
Keywords
Error Amplifier, LDO, Gain, Regulator.
Citations
IEEE
Shivani. S. Tantarpale, Ms. Archana O. Vyas. An Approach for Reduction in Power Consumption in Low Voltage Dropout Regulator, International Journal of Advance Research, Ideas and Innovations in Technology, www.IJARIIT.com.
APA
Shivani. S. Tantarpale, Ms. Archana O. Vyas (2016). An Approach for Reduction in Power Consumption in Low Voltage Dropout Regulator. International Journal of Advance Research, Ideas and Innovations in Technology, 2(6) www.IJARIIT.com.
MLA
Shivani. S. Tantarpale, Ms. Archana O. Vyas. "An Approach for Reduction in Power Consumption in Low Voltage Dropout Regulator." International Journal of Advance Research, Ideas and Innovations in Technology 2.6 (2016). www.IJARIIT.com.
Shivani. S. Tantarpale, Ms. Archana O. Vyas. An Approach for Reduction in Power Consumption in Low Voltage Dropout Regulator, International Journal of Advance Research, Ideas and Innovations in Technology, www.IJARIIT.com.
APA
Shivani. S. Tantarpale, Ms. Archana O. Vyas (2016). An Approach for Reduction in Power Consumption in Low Voltage Dropout Regulator. International Journal of Advance Research, Ideas and Innovations in Technology, 2(6) www.IJARIIT.com.
MLA
Shivani. S. Tantarpale, Ms. Archana O. Vyas. "An Approach for Reduction in Power Consumption in Low Voltage Dropout Regulator." International Journal of Advance Research, Ideas and Innovations in Technology 2.6 (2016). www.IJARIIT.com.
Abstract
A low-dropout or LDO regulator is a DC linear voltage regulator which can control the output voltage even when the supply voltage is very close to the output voltage. The advantages of a low dropout voltage regulator include the absence of switching noise ( as no switching takes place), smaller device size ( as neither large inductors nor transformers are needed), and greater design simplicity (usually consists of a reference, an amplifier and a pass element). A significant adiabatic logic with 180 nm CMOS technology is proposed to reduce impact of power supply reductions well as a simple symmetric operational transconductance amplifier is used as the error amplifier (EA), with a current splitting method adopted to increase the gain and also improves the bandwidth of the LDO regulator.