Nowadays the requirements of low power electronics play a vital role in various fields. In this paper we introducing the novel comparator is one of the fundamental units in VLSI design and also it can be employed in various applications like Digital Signal Processors (DSP) and Data Processing, Communication Systems, Medical Electronics etc., Comparator is involved to the most basic arithmetic operation of compression between any two variables either it may be an equal one or unequal. In early days, the comparator techniques used to implement energy optimization in low power circuits but the static power dissipation need to improve the comparator using logic styles. In this paper, the 2-bit comparator has been designed by using pass-transistor logic (PTL). PTL provide good performance by reducing transistor count as well as power because PTL logic helps in reducing the transistor count compared to other logic operation. The design was implemented in Cadence virtuoso TMSC 180nm CMOS technology and it’s obtaining the total power dissipation 1.394µw. PTL logic is used to reduce both transistor count and power dissipation in magnitude comparator is used to improve the good quality performance of this circuit.