Manuscripts

Recent Papers

Review Paper

Channel and Clipping Level Estimation For OFDM in IoT –Based Networks: A Review

Internet of Things (IoT) is the idea to connect all devices to the internet. To implement such systems, we need to design low cost and less complex transmitters and make the receiver side complex. Nowadays OFDM is mainly used for communication due to its great advantages. But it faces the main problem such as PAPR due to the non-linear performance of High power amplifiers. There are so many methods are available to reduce the effect of PAPR in OFDM transmission, among this clipping is the simplest one. In this paper, we propose two algorithms to find the clipping level as well as the channel estimation. The efficiency of these algorithms is evaluated by using CLRB calculation.

Published by: Ranjith T. K, Sini .M, Sareena Abdul Rasheed

Author: Ranjith T. K

Paper ID: V3I6-1501

Paper Status: published

Published: December 29, 2017

Full Details
Research Paper

The Multiband Patch Antenna with Square and Hexagonal Shape for Different Wireless Applications

Fractal geometry involves a recursive generating methodology those results in the figure with infinitely convoluted fine structures. They do not use additional loading components and are simple and cost-effective to fabricate. They can be mounted to constraining form factors, such as the casing of hand-held transceivers. In this paper, a fractal antenna is designed with Square and Hexagonal shape and operating between 4-7 GHz. The proposed antenna with the rectangular ground plane is modeled and simulated with Finite Element Method (FEM) based High-Frequency Structure Simulator (HFSS) and an improvement in performance parameters (Return loss, Bandwidth (BW) and VSWR) is observed with change in design parameters. Fractal antennas prove worthwhile, high performance, resonant antennas for many practical applications. It is usually fabricated as or on small circuit boards, they allow new versatility in their use with wireless devices.

Published by: Shmile, Pankaj Sharma , Puneet Jain

Author: Shmile

Paper ID: V3I6-1500

Paper Status: published

Published: December 29, 2017

Full Details
Research Paper

Automatic Power Factor Correction by Fine Tuning of Graded Capacitors

Today’s power system demands improved power factor in order to harness various advantages associated with improved power factor. Till date, various methods have been deployed to improve the power factor of the power system. This paper mainly focuses on a novel methodology for reactive power compensation and thereby power factor improvement at the load end. This paper presents a novel approach of capacitance grading for achieving fine-tuning of power factor. The concept for automatic power factor correction by fine-tuning of graded capacitors with the help of microcontroller and binary logic is proposed, simulated, and implemented. The method presented is of iterative nature and is cost competitive over other deployed methods. An algorithm is developed and a model is made to deploy the concept of iteration with binary logic. The same is tested on an induction motor and results obtained are analyzed.

Published by: Harnekar Aadam Ismail, Gaurang Kumar B. Patel

Author: Harnekar Aadam Ismail

Paper ID: V3I6-1496

Paper Status: published

Published: December 28, 2017

Full Details
Research Paper

Characterization and Reuse Avenues of BOF Slag as Flux Material in Sinter

The present study “Characterization and Reuse avenues of BOF Slag as a flux material in sinter” is focused on waste utilization for a sustainable growth and development. In an integrated steel plant, approximately 2-4 tonnes of wastes (including solid, liquid and gas) are generated for every tonne of steel produced. Among all the wastes, slag generated at iron making and steel making units are the key area of concern. With increasing capacities, the mechanism for disposal of large quantities of slag that get generated have gained traction as the environmental issues that it could evoke could become critical for steelmakers. Over the last few years, with better understanding process there is the significant reduction in the volume of slag generated. However, slag generation remains inevitable and emphasis on its recycling remains one of the most serious concerns that need to be solved. Blast furnace granulated slag is a glassy aggregate and used as raw material for pozzolanic cement. But BOF granulated slag is crystalline and less glassy phase compared to BF slag, so 100 % utilization as pozzolanic cement manufacture is limited. Hence, alternate reuse avenues are under study at research or implementation level. The present topic is selected to study the reuse avenues of BOF Slag as a flux material in sinter.

Published by: Dr. Kalpataru Rout, Jayanta Sarita Pradhan

Author: Dr. Kalpataru Rout

Paper ID: V3I6-1494

Paper Status: published

Published: December 28, 2017

Full Details
Research Paper

A High Performance Jacobi Iterative Solver

Jacobi solver is one of the most efficient to solve a large linear system of equations. As this method involves number of iterations, it takes a longer time for giving the solution in VLSI. This paper presents an implementation of Jacobi solver in FPGA, in which, the various blocks of Jacobi solver are implemented with Kogge-Stone adder (KSA) where ever addition is required. This resulted in an enhanced performance at the cost of little increase in area. The improvement in performance is a decrease in the delay of 67.7% in the minimum period of delay, which is a substantial improvement. As compared to the Ripple carry addition (RCA), addition implementation in the KSA is found to give an area savings of 21.21% in terms of slices, an area increase of 56.60% in terms of flip-flops and an increase of 49.04% in terms of 4 input LUTs. Hence this design can be implemented in places where high performance is of primary concern. The implementation and simulation have been performed in VHDL in Xilinx 14.7 targeted to FPGA.

Published by: Chaitanya Nutalapati, Vijay Kumar Yarasi

Author: Chaitanya Nutalapati

Paper ID: V3I6-1488

Paper Status: published

Published: December 28, 2017

Full Details
Research Paper

A Fast Method to Choose the Reference Frame to Extract Inter- view Redundancy from Multiple Views

The multi-view video will become one of the most widely used video technology in the future digital video coding. Compression of multiple views to get the advantage of different use cases resulted in a lot of present research. Removal of inter-view redundancy results in the compression of multi-view videos. In this paper, we propose a method to get the relationship between any two views and apply the same relationship to other MacroBlocks prediction. This simplifies the inter-view prediction resulting in better compression by reducing the number of bits used for coding. Quantitative quality is measured by calculating the average PSNR in comparison to standard approaches

Published by: Bayyapu Ranjit Reddy, Dr. Ramana Reddy Patil

Author: Bayyapu Ranjit Reddy

Paper ID: V3I6-1487

Paper Status: published

Published: December 28, 2017

Full Details
Request a Call
If someone in your research area is available then we will connect you both or our counsellor will get in touch with you.

    [honeypot honeypot-378]

    X
    Journal's Support Form
    For any query, please fill up the short form below. Try to explain your query in detail so that our counsellor can guide you. All fields are mandatory.

      X
       Enquiry Form
      Contact Board Member

        Member Name

        [honeypot honeypot-527]

        X
        Contact Editorial Board

          X

            [honeypot honeypot-310]

            X