Efficient implementation of full adder and multiplier for power analysis in CMOS technology
In recent days, the real-time application and fast arithmetic operations require highly efficient arithmetic hardware architecture to improve the system performances. The adder plays a vital role in digital circuits, the earlier hardware architecture using conventional CMOS and transmission logic gate based full adder design. Moreover, the techniques using more number of transistors and consume larger power and delay so we proposed the techniques pass-transistor logic and transmission gate based hybrid pass logic. The hybrid technique is used to reduce the number of the transistor, so the delay and power consumption will be reduced when compared with the earlier techniques. The proposed technique design was implemented using 16 transistors in 180nm CMOS technology and it consumes 8.2075nW power and the delay reduced to 5.0146ns. For further improving the power and delay will be minimized using analog multiplier technique which is implemented in 180nm CMOS technology and it consumes 3.2993 MW power and 1.2884 ms.
Published by: Kaleeswari. S, Saranya. K
Author: Kaleeswari. S
Paper ID: V4I3-1258
Paper Status: published
Published: May 5, 2018
Implementation of pull-up/pull-down network for energy optimization in full adder circuit
Nowadays the requirements of energy-optimized low power circuits in higher-end applications such as communication, IoT, biomedical systems etc., there are several techniques used to implement energy optimization in low power circuits but the static power dissipation needs to improved such kind of circuits. The conventional topology has been implemented in basic logical gates but the delay and power much higher in each individual cell. Now we proposed an unbalanced pull-up and pull-down network in full adder circuit using symbols. These techniques were employed to reduce the static power dissipation and switching delay in each individual cell. The design was implemented in Cadence virtuoso TMSC 180nm CMOS technology and it’s obtaining the total power dissipation 5.128nW.The pull-up and pull-down network used to reduce the static power dissipation in full adder is used to improve the operating speed of each individual. For further improving the operating speed of the full adder is implemented with various gating technique like Body Biased Drain Gating, Body Biased Power Gating, Body Biased DHPH, and Body Biased DHPF those techniques are analyzed and its power and delay is obtained.
Published by: P. Aarthi, R. Suresh Kumar
Author: P. Aarthi
Paper ID: V4I3-1257
Paper Status: published
Published: May 5, 2018
Knee extensor strengthening versus hip and ankle in anterior knee pain
Anterior knee pain or patellofemoral pain syndrome is concerned of softening of articular cartilage between femur and patella causing erosion of articular cartilage mild to moderate concentric muscle contraction wasting increased “Q” angle postural change, Physiotherapy including hip and ankle strengthening and knee strengthening postural correction can improve symptoms. Purpose: The purpose of the study is to know about which of this groups are more effecting in treating the anterior knee pain effectively group “a” to strengthen hip and ankle postural correction group “b” knee strengthening patellar mobilization. Methods : 30 patients are randomly selected with anterior knee pain .the study include 2 groups group 1 receives knee strengthening patellar gliding warm water fermentation group 2 receives hip and ankle strengthening with postural correction both groups .the outcome includes visual analogue scale, Kujala scale for knee disability and knee outcome survey scale for activities of daily living . Results: There was a significant decrease in pain with hip and ankle strengthening postural correction (hip abductors, external rotator, extensors, ankle supinators, strengthening, stretching of hip adductors, internal rotators, ankle pronators) postural correction than the knee strengthening patellar mobilization (P-0.000<0.05). Hip and ankle strengthening postural correction were decreased in VAS and improving in “Q” angle. Knee extensor and patellar mobilization have not such effective treatment for patella femoral or anterior knee pain. Conclusion: Patella femoral or anterior knee pain relieves with hip and ankle strengthening with postural correction (hip abductors, external rotator, extensors, ankle supinators, strengthening, stretching of hip adductors, internal rotators, ankle pronators) postural correction.
Published by: S. Pavan Kumar, J Sravana Kumar, Lalith Mohan
Author: S. Pavan Kumar
Paper ID: V4I2-1281
Paper Status: published
Published: May 3, 2018
Design and analysis of VLSI circuit’s speed using CNFET technology
This paper presents the difference between the CNFET and CMOS technologies by using the design of an efficient 8×8 Vedic multiplier with Urdhva-Tiryagbhyam sutra. A carbon nanotube field-effect transistor (CNFET) uses either a single carbon nanotube or an array of carbon nanotubes as the channel material instead of bulk silicon in the traditional MOSFET structure. CNFETs show different characteristics compared to MOSFETs in their performances. The CNFET has many parameters such as operating voltage, number of tubes, pitch, nanotube diameter, dielectric constant, and contact materials which determine the digital circuit performance. This reduces the size of the chip but also cost and delay to a great extent. Here the comparison of CMOS technique with the proposed CNFET technique in terms of speed, power consumption, number of transistors, delay takes place.
Published by: Shaik Suhana, Yarasi Thejsawini, P. Madhavi
Author: Shaik Suhana
Paper ID: V4I3-1219
Paper Status: published
Published: May 3, 2018
Electronics notice board using Arduino
Electronic or Moving Message Boards are being used in a wide variety of applications for communicating information to people quicker and in a cost-effective manner when compared to traditional posters or paper notice boards. While e-mail is a way to converse privately with one or more people over the Internet, electronic notice boards are totally public. Any message posted on one can be read (and responded to) by everybody else in the organization who has viewed it. This paper focuses on designing an e-display which can accept data wirelessly from any authorized person who has the access of the web terminal; it means integrating the traditional moving message displays with an Arduino so that they can be accessed wirelessly as an application of IoT (Internet of Things).
Published by: Deshpande Arti Prakash, Bhatane Sadhana Gurunath, Apsingekar Sayali Jagdish, Gaurav V.Chalkikar
Author: Deshpande Arti Prakash
Paper ID: V4I3-1167
Paper Status: published
Published: May 3, 2018
A review paper to detect electricity theft in power system
The power sector is one of the most important sectors for the development of the country. Now a day’s power theft is the center of focus all over the world, but India has a more significant effect on the Indian economy because the figure is so high. The theft causes huge loss of electricity to electricity board. India loss billions of rupees because of unbilled consumption & unlaughable usage of electricity. It always a difficult task for Indian government & electricity company to achieve their aim due to power theft. The recent researcher observes that 30-35% profit of electric board is waste in power theft. And this amount is recovered by increasing the price of electricity & the looser are the honest customer. Electricity theft can be reduced by applying technical solutions such as tamper-proof meters, managerial methods such as inspection and monitoring, and in some cases restructuring power systems ownership and regulation. So the aim of our paper is to eliminate all this difficulty like overload & heavy power and revenue loss that occurs due to power theft by designing the simple device to send & receive a message to the receiver for locating the area where the theft is occurring. Then according to the type of theft done by the accused, device helps to deactivate the power supply of particular home or area.
Published by: Pallavi S. Borle, Sonal S. Tayade, Vishal S. Wawge, Yogesh Sushir
Author: Pallavi S. Borle
Paper ID: V4I3-1194
Paper Status: published
Published: May 3, 2018
