Floating point operations in digital systems form an integral part in the design of many digital processors. Digital Signal Processor is the most important application of floating point operations. In the recent years many approaches for floating point operations have been proposed and their merits and demerits are compared. For floating point operations the operands are first converted into IEEE 754 format in either single precision or double precision format. The arithmetic operations are performed on the significant part of the IEEE format. In this paper various floating point operation unit architectures are reviewed. Few designers work on high speed architectures for reducing the delay of the overall circuit while others work on the area utilization parameters. Then the conclusion is drawn based on various architectural analyses.