In the ever-growing world of computer architecture, Instruction Set Architecture (ISA) is one of the major components of a computer system, as it provides the information about the instructions present in the system prior to the programmer. Having various implementations and uses it is classified into various categories, RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) being two, both being a bit different in their basic architecture and working. Both CISC and RISC architectures continue to be widely used. The research topic on CISC and RISC has been a well-known research area for many years. Since modern processors have to address both power consumption and performance, it is important to compare these architectures to support future project decisions. Our paper also includes basic details regarding the various addressing modes, instruction formats along with the instruction execution cycle giving detailed information about RISC and CISC processors simultaneously.